It has been proved by both theoretical research and experience investigation that when a stress is applied to a channel of a transistor, the carrier mobility of the transistor will be increased or decreased. However, it is also known that electrons and holes have different responses to strains of the same type. For example, applying a compressive stress in the direction of current flow is favorable to the hole mobility but harmful to the electron mobility, while applying a tensile stress is favorable to the electron mobility but harmful to the hole mobility. To be specific, with respect to an nMOS device, applying a tensile stress along the direction of the channel will increase mobility of electrons in the channel; on the other hand, with respect to a pMOS device, applying a compressive stress along the direction of the channel will increase mobility of holes in the channel. With the continuous reduction in the feature size of the device, the strained channel engineering for the purpose of increasing mobility of carriers in the channel is playing a more and more important role. However, smaller device pitch will result in more difficulties in applying strong stresses to the MOSFET.
Therefore, there is still need for a new structure and a method that can easily increase the stress in the channel.